CVE-2024-42279
spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
Description
In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer.
INFO
Published Date :
Aug. 17, 2024, 9:15 a.m.
Last Modified :
Oct. 2, 2025, 6:32 p.m.
Remotely Exploit :
No
Source :
416baaa9-dc9f-4396-8d5f-8c081fb06d67
CVSS Scores
| Score | Version | Severity | Vector | Exploitability Score | Impact Score | Source |
|---|---|---|---|---|---|---|
| CVSS 3.1 | MEDIUM | [email protected] |
Solution
- Update the affected packages.
- Update the affected kernel package.
References to Advisories, Solutions, and Tools
Here, you will find a curated list of external links that provide in-depth
information, practical solutions, and valuable tools related to
CVE-2024-42279.
CWE - Common Weakness Enumeration
While CVE identifies
specific instances of vulnerabilities, CWE categorizes the common flaws or
weaknesses that can lead to vulnerabilities. CVE-2024-42279 is
associated with the following CWEs:
Common Attack Pattern Enumeration and Classification (CAPEC)
Common Attack Pattern Enumeration and Classification
(CAPEC)
stores attack patterns, which are descriptions of the common attributes and
approaches employed by adversaries to exploit the CVE-2024-42279
weaknesses.
We scan GitHub repositories to detect new proof-of-concept exploits. Following list is a collection of public exploits and proof-of-concepts, which have been published on GitHub (sorted by the most recently updated).
Results are limited to the first 15 repositories due to potential performance issues.
The following list is the news that have been mention
CVE-2024-42279 vulnerability anywhere in the article.
The following table lists the changes that have been made to the
CVE-2024-42279 vulnerability over time.
Vulnerability history details can be useful for understanding the evolution of a vulnerability, and for identifying the most recent changes that may impact the vulnerability's severity, exploitability, or other characteristics.
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Initial Analysis by [email protected]
Oct. 02, 2025
Action Type Old Value New Value Added CVSS V3.1 AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H Added CWE NVD-CWE-noinfo Added CPE Configuration OR *cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* versions from (including) 6.7 up to (excluding) 6.10.3 *cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* versions from (including) 6.0 up to (excluding) 6.6.44 Added Reference Type kernel.org: https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80 Types: Patch Added Reference Type kernel.org: https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75 Types: Patch Added Reference Type kernel.org: https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927 Types: Patch -
CVE Received by 416baaa9-dc9f-4396-8d5f-8c081fb06d67
Aug. 17, 2024
Action Type Old Value New Value Added Description In the Linux kernel, the following vulnerability has been resolved: spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer. Added Reference kernel.org https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80 [No types assigned] Added Reference kernel.org https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75 [No types assigned] Added Reference kernel.org https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927 [No types assigned]